Filterformula for DSP data filtering

The formula inside the FPGA is the standard convention with the signs:

y₀ = b₀x₀ + b₁x₁ + b₂x₂ - a₁y₁ - a₂y₂

index 0 is the current data (x) and current calculated value (y)
index 1 is the previous data (x) and previously calculated value (y)
index 2 is the data from before the previous data (x) and the data calculated before the previously calculated value (y)

Each filter stage is second order.

There are four filter stages.

Higher order filters can be expressed as a combination of second order filters